STM32F723VC數(shù)據(jù)手冊(cè)中文資料規(guī)格書

描述 Description

The STM32F722xx and STM32F723xx devices are based on the high-performance Arm? Cortex?-M7 32-bit RISC core operating at up to 216 MHz frequency. The Cortex?-M7 core features a single floating point unit (SFPU) precision which supports Arm? single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances the application security.

The STM32F722xx and STM32F723xx devices incorporate high-speed embedded memories with a Flash memory up to 512 Kbytes, 256 Kbytes of SRAM (including 64 Kbytes of data TCM RAM for critical real-time data), 16 Kbytes of instruction TCM RAM (for critical real-time routines), 4 Kbytes of backup SRAM available in the lowest power modes, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses, a 32-bit multi-AHB bus matrix and a multi layer AXI interconnect supporting internal and external memories access.

All the devices offer three 12-bit ADCs, two DACs, a low-power RTC, thirteen general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers, a true random number generator (RNG). They also feature standard and advanced communication interfaces.

特性 Features

? Core: Arm? 32-bit Cortex?-M7 CPU with FPU, adaptive real-time accelerator (ART Accelerator) and L1-cache: 8 Kbytes of data cache and 8 Kbytes of instruction cache, allowing 0-wait state execution from embedded Flash memory and external memories, frequency up to 216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1) and DSP instructions.
? Memories
?Up to 512 Kbytes of Flash memory with protection mechanisms (read and write protections, proprietary code readout protection (PCROP))
?528 bytes of OTP memory
?SRAM: 256 Kbytes (including 64 Kbytes of data TCM RAM for critical real-time data) + 16 Kbytes of instruction TCM RAM (for critical real-time routines) + 4 Kbytes of backup SRAM (available in the lowest power modes)
?Flexible external memory controller with up to 32-bit data bus: SRAM, PSRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
? Dual mode Quad-SPI
? Clock, reset and supply management
?1.7 V to 3.6 V application supply and I/Os
?POR, PDR, PVD and BOR
?Dedicated USB power
?4-to-26 MHz crystal oscillator
?Internal 16 MHz factory-trimmed RC (1% accuracy)
?32 kHz oscillator for RTC with calibration
?Internal 32 kHz RC with calibration
? Low-power
?Sleep, Stop and Standby modes
?VBAT supply for RTC, 32×32 bit backup registers + 4 Kbytes of backup SRAM
? 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode
? 2×12-bit D/A converters
? Up to 18 timers: up to thirteen 16-bit (1x low- power 16-bit timer available in Stop mode) and two 32-bit timers, each with up to 4 IC/OC/PWMs or pulse counter and quadrature (incremental) encoder inputs. All 15 timers running up to 216 MHz. 2x watchdogs, SysTick timer
? General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
? Debug mode
?SWD and JTAG interfaces
?Cortex?-M7 Trace Macrocell?
? Up to 140 I/O ports with interrupt capability
?Up to 136 fast I/Os up to 108 MHz
?Up to 138 5 V-tolerant I/Os
? Up to 21 communication interfaces
?Up to 3× I2C interfaces (SMBus/PMBus)
?Up to 4 USARTs/4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, modem control)
?Up to 5 SPIs (up to 54 Mbit/s), 3 with muxed simplex I2Ss for audio class accuracy via internal audio PLL or external clock
?2 x SAIs (serial audio interface)
?1 x CAN (2.0B active)
?2 x SDMMCs
? Advanced connectivity
?USB 2.0 full-speed device/host/OTG controller with on-chip PHY
?USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and on-chip Hi-speed PHY or ULPI depending on the part number
? True random number generator
? CRC calculation unit
? RTC: subsecond accuracy, hardware calendar
? 96-bit unique ID