TPSI2140-Q1_V01中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書

1 Features

? Qualified for automotive applications

– AEC-Q100 grade 1: –40 to 125°C ambient

operating temperature

? Integrated avalanche rated MOSFETs

– Designed and qualified to operate in avalanche

mode during overvoltage conditions

? IAVA = 2-mA for 5-s pulses, 1-mA for 60-s

pulses

– 1200-V standoff voltage

– RON = 130-Ω (TJ = 25°C)

– TON, TOFF < 700-μs

? Low primary side supply current

– 9-mA ON state current

– 3.5-μA OFF state current

? Functional Safety Capable

– Documentation available to aid in ISO 26262

and IEC 61508 system design

? Robust isolation barrier:

– > 26 year projected lifetime at 1000-VRMS /

1500-VDC working voltage

– Isolation rating, VISO, up to 3750-VRMS / 5300-

VDC

– Peak surge, VIOSM, up to 5000-V

– ± 100-V/ns typical CMTI

? SOIC (DWQ-11) package with wide pins for

improved thermal capability

– Creepage and clearance ≥ 8-mm (primarysecondary)

– Creepage and clearance ≥ 6-mm (across

switch terminals)

? Safety-related certifications

– (Planned) DIN VDE V 0884-11:2017-01

– (Planned) UL 1577 component recognition

program

2 Applications

? Solid state relay

? Hybrid, electric, and power train systems

? Battery Management Systems (BMS)

? Solar energy

? Onboard charger

? Electric vehicle chargers (EV)

3 Description

The TPSI2140-Q1 is an isolated solid state

relay designed for high voltage automotive and

industrial applications. The TPSI2140-Q1 uses TI's

high reliability capacitive isolation technology in

combination with internal back-to-back MOSFETs to

form a completely integrated solution requiring no

secondary side power supply.

The entire primary side of the device requires only 9

mA of input current, enabling the user to drive both

the VDD and EN pins from a single microcontroller

GPIO and eliminating the need for an external low

side switch used in photo relay solutions. The user

can also choose to connect the VDD pin to a system

supply between 5 V–20 V and drive the EN pin

from a GPIO. The EN pin is fail-safe preventing any

possibility of back powering the VDD supply.

The secondary side consists of back-to-back

MOSFETs with a standoff voltage of ±1.2 kV from

S1 to S2. The TPSI2140-Q1 MOSFET's avalanche

robustness and thermally conscious package design

allow it to survive system level High Potential (HiPot)

screening and DC fast charger surge currents of up to

2 mA without requiring any external components.