PMUX582FPWTSEP中文資料德州儀器數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

1 Features

? Radiation hardened

? Single event latch-up (SEL) immune to 43 MeVcm2/

mg at 125°C

? ELDRS free to 30 krad(Si)

? Total ionizing dose (TID) RLAT for every wafer lot

up to 20 krad(Si)

? TID characterized up to 50 krad(Si)

? Space enhanced plastic

? Supply range: 8 V to 22 V or ±5 V to ±16.5 V

? Integrated powered-off and overvoltage protection:

– Overvoltage tolerance up to 85 V from source

to supplies or to drain

– Overvoltage and power-off

protected up to ±60 V

– Cold sparing capable up to ±60 V

– Adjustable fault threshold thresholds (Vfp and

Vfn) from 5 V to supplies

– Interrupt flag feedback indicating faulted

channel

– Non-fault channels continue to operate with low

leakage currents

? Latch-up immune construction

? Precision performance with 100 pA typical leakage

current, 3.5 pF capacitance, and 1 Ron flatness

? Operating temperature from –55°C to +125°C

? Controlled baseline

? Gold wire

? NiPdAu lead finish

? Extended product life cycle

? Extended product-change notification

? Product traceability

? Enhanced mold compound for low outgassing

? Small, industry standard TSSOP-20 packaging

2 Applications

? Low earth orbit (LEO) space applications

? Remote interface unit (RIU)

? Remote telemetry unit (RTU)

? System monitoring for space

? Latch-up and overvoltage detection

? Power-up sequencing protection

? Satellite telemetry and telecommand for onboard

data handling

? Sensor data acquisition

3 Description

The TMUX582F-SEP is a modern 8:1 multiplexer

suitable for both single ended and differential

operation. This latch-up immune device offers robust

overvoltage protection up to ±60 V making it optimal

for harsh space environments. Additionally, this

protection operates in powered-on, powered-off, and

floating supply conditions.

During a fault such as an overvoltage or undervoltage

event, the offending channel turns OFF and the Sx

pin becomes high impedance. If this fault channel is

selected, the drain (D) is pulled to the fault rail that

is exceeded (Vfp or Vfn). All other Sx pins which

are not under fault continue to operate normally.

During normal operation, when the source (Sx) does

not exceed Vfp or Vfn, the switch operates with

low leakage, low capacitance and an ultra-flat onresistance.

This provides high performance signal

integrity with minimal distortion.

The TMUX582F-SEP is a fault protected CMOS

multiplexer flexible enough to handle almost any

application, from system monitoring, to power-up

sequencing protection, to high precision front end

data acquisition.