PIC18F4620中文資料SYC數(shù)據(jù)手冊PDF規(guī)格書

Power Management Features:

? Run: CPU on, Peripherals on

? Idle: CPU off, Peripherals on

? Sleep: CPU off, Peripherals off

? Ultra Low 50nA Input Leakage

? Run mode Currents Down to 11 μA Typical

? Idle mode Currents Down to 2.5 μA Typical

? Sleep mode Current Down to 100 nA Typical

? Timer1 Oscillator: 900 nA, 32 kHz, 2V

? Watchdog Timer: 1.4 μA, 2V Typical

? Two-Speed Oscillator Start-up

Special Microcontroller Features:

? C Compiler Optimized Architecture:

- Optional extended instruction set designed to

optimize re-entrant code

? 100,000 Erase/Write Cycle Enhanced Flash

Program Memory Typical

? 1,000,000 Erase/Write Cycle Data EEPROM

Memory Typical

? Flash/Data EEPROM Retention: 100 Years Typical

? Self-Programmable under Software Control

? Priority Levels for Interrupts

? 8 x 8 Single-Cycle Hardware Multiplier

? Extended Watchdog Timer (WDT):

- Programmable period from 4 ms to 131s

? Single-Supply 5V In-Circuit Serial

Programming? (ICSP?) via Two Pins

? In-Circuit Debug (ICD) via Two Pins

? Wide Operating Voltage Range: 2.0V to 5.5V

? Programmable Brown-out Reset (BOR) with

Software Enable Option