PCA9601D

Dual bidirectional bus buffer; Bidirectional data transfer of I2C-bus signals\n15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads\nIsolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side\n1 MHz operation on up to 20 meters of wire (see AN10658)\nSupply voltage range of 2.5 V to 15 V with I2C-bus logic levels on SX/SY sideindependent of supply voltage\nSplits I2C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interfacewith opto-electrical isolators and similar devices that need unidirectional input andoutput signal paths\nLow power supply current\nESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101\nLatch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA\nPackages offered: SO8 and TSSOP8 (MSOP8)\n;

The PCA9601 is designed to isolate I2C-bus capacitance, allowing long buses to bedriven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is ahigher-speed version of the P82B96 and a higher drive version of the PCA9600 thatallows many more Fast-mode Plus (Fm+) slaves on remote daughter cards in applicationswith temperature range of 0 °C to 85 °C.\nIt creates a non-latching, bidirectional, logic interface between a normal I2C-bus and arange of other higher capacitance or different voltage bus configurations. It can operate atspeeds up to at least 1 MHz, and the high drive side is compatible with the Fast-modePlus specifications.\nThe PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interfacemaking it suitable for interfacing with buses that have non I2C-bus-compliant logic levelssuch as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.\n15 mA drive capability over 0 °C to 85 °C at SX/SY allows driving a 5 V Fm+ bus with470 pF loading.\nThe separation of the bidirectional I2C-bus signals into unidirectional TX and RX signalsenables the SDA and SCL signals to be transmitted via balanced transmission lines(twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RXsignals may be connected together to provide a normal bidirectional signal.\n

恩XP

PCA9601D

Dual bidirectional bus buffer

ETC

PCA9601DP

Dual bidirectional bus buffer; Bidirectional data transfer of I2C-bus signals\n15 mA SX/SY sink capability yields 5 V Fm+ bus rise time with 470 pF loads\nIsolates capacitance allowing > 400 pF on SX/SY side and 4000 pF on TX/TY side\n1 MHz operation on up to 20 meters of wire (see AN10658)\nSupply voltage range of 2.5 V to 15 V with I2C-bus logic levels on SX/SY sideindependent of supply voltage\nSplits I2C-bus signal into pairs of forward/reverse TX/RX, TY/RY signals for interfacewith opto-electrical isolators and similar devices that need unidirectional input andoutput signal paths\nLow power supply current\nESD protection exceeds 3500 V HBM per JESD22-A114, and 1400 V CDM per JESD22-C101\nLatch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA\nPackages offered: SO8 and TSSOP8 (MSOP8)\n;

The PCA9601 is designed to isolate I2C-bus capacitance, allowing long buses to bedriven in point-to-point or multipoint applications of up to 4000 pF. The PCA9601 is ahigher-speed version of the P82B96 and a higher drive version of the PCA9600 thatallows many more Fast-mode Plus (Fm+) slaves on remote daughter cards in applicationswith temperature range of 0 °C to 85 °C.\nIt creates a non-latching, bidirectional, logic interface between a normal I2C-bus and arange of other higher capacitance or different voltage bus configurations. It can operate atspeeds up to at least 1 MHz, and the high drive side is compatible with the Fast-modePlus specifications.\nThe PCA9601 features temperature-stabilized logic voltage levels at its SX/SY interfacemaking it suitable for interfacing with buses that have non I2C-bus-compliant logic levelssuch as SMBus, PMBus, or with microprocessors that use those same TTL logic levels.\n15 mA drive capability over 0 °C to 85 °C at SX/SY allows driving a 5 V Fm+ bus with470 pF loading.\nThe separation of the bidirectional I2C-bus signals into unidirectional TX and RX signalsenables the SDA and SCL signals to be transmitted via balanced transmission lines(twisted pairs), or with galvanic isolation using opto or magnetic coupling. The TX and RXsignals may be connected together to provide a normal bidirectional signal.\n

恩XP

PCA9601DP

Dual bidirectional bus buffer

ETC

PCA9617ADP

NXP
MSOP8

恩XP