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MC74HC112AFELG中文資料安森美半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

MC74HC112AFELG
廠商型號(hào)

MC74HC112AFELG

功能描述

Dual J-K Flip-Flop with Set and Reset High??erformance Silicon??ate CMOS

文件大小

181.12 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 ON Semiconductor
企業(yè)簡稱

ONSEMI安森美半導(dǎo)體

中文名稱

安森美半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊

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更新時(shí)間

2025-5-28 23:00:00

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MC74HC112AFELG規(guī)格書詳情

The MC74HC112A is identical in pinout to the LS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

Each flip?flop is negative?edge clocked and has active?low asynchronous Set and Reset inputs.

The HC112A is identical in function to the HC76, but has a different pinout.

Features

? Output Drive Capability: 10 LSTTL Loads

? Outputs Directly Interface to CMOS, NMOS, and TTL

? Operating Voltage Range: 2.0 to 6.0 V

? Low Input Current: 1.0 A

? High Noise Immunity Characteristic of CMOS Devices

? In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

? Similar in Function to the LS112 Except When Set and Reset are

Low Simultaneously

? Chip Complexity: 100 FETs or 25 Equivalent Gates

? These are Pb?Free Devices

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MOT
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