MC14562BCP中文資料安森美半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 through bit 128. This complementary MOS shift register is primarily used where low power dissipation and/or high noise immunity is desired.

? Diode Protection on All Inputs

? Fully Static Operation

? Cascadable to Provide Longer Shift Register Lengths

? Supply Voltage Range = 3.0 Vdc to 18 Vdc

? Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range