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LC4512C-5F256I中文資料萊迪思數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
| 廠(chǎng)商型號(hào) |
LC4512C-5F256I |
| 功能描述 | 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs |
| 文件大小 |
483.61 Kbytes |
| 頁(yè)面數(shù)量 |
74 頁(yè) |
| 生產(chǎn)廠(chǎng)商 | Lattice Semiconductor |
| 企業(yè)簡(jiǎn)稱(chēng) |
LATTICE【萊迪思】 |
| 中文名稱(chēng) | 萊迪思半導(dǎo)體公司官網(wǎng) |
| 原廠(chǎng)標(biāo)識(shí) |  |
| 數(shù)據(jù)手冊(cè) | |
| 更新時(shí)間 | 2025-7-18 12:35:00 |
| 人工找貨 | LC4512C-5F256I價(jià)格和庫(kù)存，歡迎聯(lián)系客服免費(fèi)人工找貨 |
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ispMACH 4000 Introduction
The high performance ispMACH 4000 family from Lattice offers a SuperFAST CPLD solution. The family is a blend of Lattice’s two most popular architectures: the ispLSI? 2000 and ispMACH 4A. Retaining the best of both families, the ispMACH 4000 architecture focuses on significant innovations to combine the highest performance with low power in a flexible CPLD family.
Features
■ High Performance
? fMAX = 400MHz maximum operating frequency
? tPD = 2.5ns propagation delay
? Up to four global clock pins with programmable clock polarity control
? Up to 80 PTs per output
■ Ease of Design
? Enhanced macrocells with individual clock, reset, preset and clock enable controls
? Up to four global OE controls
? Individual local OE control per I/O pin
? Excellent First-Time-FitTM and refit
? Fast path, SpeedLockingTM Path, and wide-PT path
? Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders
■ Zero Power (ispMACH 4000Z) and Low Power (ispMACH 4000V/B/C)
? Typical static current 10μA (4032Z)
? Typical static current 1.3mA (4000C)
? 1.8V core low dynamic power
? ispMACH 4000Z operational down to 1.6V VCC
■ Broad Device Offering
? Multiple temperature range support
– Commercial: 0 to 90°C junction (Tj)
– Industrial: -40 to 105°C junction (Tj)
– Extended: -40 to 130°C junction (Tj)
? For AEC-Q100 compliant devices, refer to LA-ispMACH 4000V/Z Automotive Data Sheet
■ Easy System Integration
? Superior solution for power sensitive consumer applications
? Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
? Operation with 3.3V (4000V), 2.5V (4000B) or 1.8V (4000C/Z) supplies
? 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI interfaces
? Hot-socketing
? Open-drain capability
? Input pull-up, pull-down or bus-keeper
? Programmable output slew rate
? 3.3V PCI compatible
? IEEE 1149.1 boundary scan testable
? 3.3V/2.5V/1.8V In-System Programmable (ISP?) using IEEE 1532 compliant interface
? I/O pins with fast setup path
? Lead-free package options
產(chǎn)品屬性
- 型號(hào)：
LC4512C-5F256I
- 功能描述：
CPLD - 復(fù)雜可編程邏輯器件 PROGRAMMABLE SUPER FAST HI DENSITY PLD
- RoHS：
否
- 制造商：
Lattice
- 存儲(chǔ)類(lèi)型：
EEPROM
- 大電池?cái)?shù)量：
128
- 最大工作頻率：
333 MHz
- 延遲時(shí)間：
2.7 ns
- 可編程輸入/輸出端數(shù)量：
64
- 工作電源電壓：
3.3 V
- 最大工作溫度：
+ 90 C
- 最小工作溫度：
0 C
- 封裝/箱體：
TQFP-100
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
LATTICE/萊迪斯 |
22+ |
NA |
35000 |
原裝現(xiàn)貨,假一罰十 |
詢(xún)價(jià) | ||
LATTICE/萊迪斯 |
22+ |
N/A |
12245 |
現(xiàn)貨,原廠(chǎng)原裝假一罰十! |
詢(xún)價(jià) | ||
LATTICE/萊迪斯 |
24+ |
BGA256 |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢(xún)價(jià) | ||
LATTICE |
2023+ |
BGA |
3000 |
進(jìn)口原裝現(xiàn)貨 |
詢(xún)價(jià) | ||
LATTICE/萊迪斯 |
23+ |
BGA |
13000 |
原廠(chǎng)授權(quán)一級(jí)代理,專(zhuān)業(yè)海外優(yōu)勢(shì)訂貨,價(jià)格優(yōu)勢(shì)、品種 |
詢(xún)價(jià) | ||
LATTICE |
23+ |
BGA |
12800 |
公司只有原裝 歡迎來(lái)電咨詢(xún)。 |
詢(xún)價(jià) | ||
Lattice |
2308+ |
LBGA-256 |
4980 |
Lattice全系列進(jìn)口原裝特價(jià) |
詢(xún)價(jià) | ||
Lattic |
25+ |
25000 |
原廠(chǎng)原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開(kāi)票! |
詢(xún)價(jià) | |||
LATTICE |
2447 |
BGA256 |
100500 |
一級(jí)代理專(zhuān)營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢(xún)價(jià) | ||
LATTICE/萊迪斯 |
23+ |
BGA |
50000 |
全新原裝正品現(xiàn)貨,支持訂貨 |
詢(xún)價(jià) |
