GTL2003PW中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書

General description

The Gunning Transceiver Logic - Transceiver Voltage Clamps (GTL-TVC) provide high-speed voltage translation with low ON-state resistance and minimal propagation delay. The GTL2003 provides 8 NMOS pass transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The device allows bidirectional voltage translations between 1.0 V and 5.0 V without use of a direction pin.

Features

■ 8-bit bidirectional low voltage translator

■ Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels

■ Provides bidirectional voltage translation with no direction pin

■ Low 6.5 ? ON-state resistance (Ron) between input and output pins (Sn/Dn)

■ Supports hot insertion

■ No power supply required: will not latch up

■ 5 V tolerant inputs

■ Low standby current

■ Flow-through pinout for ease of printed-circuit board trace routing

■ ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101

■ Packages offered: TSSOP20, DHVQFN20

Applications

■ Any application that requires bidirectional or unidirectional voltage level translation from any voltage from 1.0 V to 5.0 V to any voltage from 1.0 V to 5.0 V

■ The open-drain construction with no direction pin is ideal for bidirectional low voltage (for example, 1.0 V, 1.2 V, 1.5 V, or 1.8 V) processor I2C-bus port translation to the normal 3.3 V and/or 5.0 V I2C-bus signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels.