EVAL-AD7687SDZ開發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

EVAL-AD7687SDZ屬于開發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的EVAL-AD7687SDZ評(píng)估板 - 模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器 (ADC) 評(píng)估板是預(yù)裝有元器件的電路板，用于提供特定 ADC 或器件工作實(shí)例。特定板上的 A/D 轉(zhuǎn)換器數(shù)量從 3 到 32 不等，每秒采樣率從 2.5 kHz 到 26 GHz 不等，輸入電壓范圍從 0 到 8 Vp-p。

GENERAL DESCRIPTION

The AD7687 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN? pins. The voltages on these pins usually swing in opposite phase between 0 V to REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage.

FEATURES

16-bit resolution with no missing codes

Throughput: 250 kSPS

INL: ±0.4 LSB typ, ±1.5 LSB max (±23 ppm of FSR)

Dynamic range: 96.5 dB

S/(N + D): 95.5 dB @ 20 kHz

THD: ?118 dB @ 20 kHz

True differential analog input range

±VREF

0 V to VREF with VREF up to VDD on both inputs

No pipeline delay

Single-supply 2.3 V to 5.5 V operation with

1.8 V/2.5 V/3 V/5 V logic interface

Serial interface SPI?/QSPI?/MICROWIRE?/DSP-compatible

Daisy-chain multiple ADCs and BUSY indicator

Power dissipation

1.35 mW @ 2.5 V/100 kSPS, 4 mW @ 5 V/100 kSPS, and

1.4 μW @ 2.5 V/100 SPS

Standby current: 1 nA

10-lead MSOP (MSOP-8 size) and

3 mm × 3 mm QFN (LFCSP) (SOT-23 size)

Pin-for-pin compatible with AD7685, AD7686, and AD7688

APPLICATIONS

Battery-powered equipment

Data acquisitions

Instrumentation

Medical instruments

Process controls