AD9912A/PCBZ開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件規(guī)格書(shū)PDF中文資料

AD9912A/PCBZ屬于開(kāi)發(fā)板套件編程器的評(píng)估演示板及套件。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9912A/PCBZ評(píng)估和演示板及套件該系列產(chǎn)品提供了一種方便的方法，在經(jīng)過(guò)驗(yàn)證的實(shí)施環(huán)境中評(píng)估某些重點(diǎn)器件的性能或特性。評(píng)估方法通常有完善的文檔說(shuō)明，并且視乎具體情況由評(píng)估軟件提供支持。產(chǎn)品通常由印刷電路板組成，板上已裝有重點(diǎn)器件以及必要或有用的支持元器件，另外也可能包括其他組件，例如電纜或電源。對(duì)于數(shù)量特別多或類別獨(dú)特的器件類別(如 ADC、DAC 和開(kāi)關(guān)模式電源)，評(píng)估平臺(tái)可組合為一個(gè)單獨(dú)的產(chǎn)品系列。

FEATURES

? 1 GSPS internal clock speed (up to 400 MHz output directly)

? Integrated 1 GSPS 14-bit DAC

? 48-bit frequency tuning word with 4 μHz resolution

? Differential HSTL comparator

? Flexible system clock input accepts either crystal or external

reference clock

? On-chip low noise PLL REFCLK multiplier

? 2 SpurKiller channels

? Low jitter clock doubler for frequencies up to 750 MHz

? Single-ended CMOS comparator; frequencies of <150 MHz

? Programmable output divider for CMOS output

? Serial I/O control

? Excellent dynamic performance

? Software controlled power-down

? Available in two 64-lead LFCSP packages

? Residual phase noise @ 250 MHz

? 10 Hz offset: ?113 dBc/Hz

? 1 kHz offset: ?133 dBc/Hz

? 100 kHz offset: ?153 dBc/Hz

? 40 MHz offset: ?161 dBc/Hz

APPLICATIONS

? Agile LO frequency synthesis

? Low jitter, fine tune clock generation

? Test and measurement equipment

? Wireless base stations and controllers

? Secure communications

? Fast frequency hopping