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AD9548SLASHPCBZ中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
AD9548SLASHPCBZ |
功能描述 | Quad/Octal Input Network Clock Generator/Synchronizer |
文件大小 |
1.87658 Mbytes |
頁面數(shù)量 |
112 頁 |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡稱 |
AD【亞德諾】 |
中文名稱 | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識 | ![]() |
數(shù)據(jù)手冊 | |
更新時間 | 2025-5-29 22:30:00 |
人工找貨 | AD9548SLASHPCBZ價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
AD9548SLASHPCBZ規(guī)格書詳情
GENERAL DESCRIPTION
The AD9548 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.
The AD9548 operates over an industrial temperature range of ?40°C to +85°C.
FEATURES
Supports Stratum 2 stability in holdover mode
Supports reference switchover with phase build-out
Supports hitless reference switchover
Auto/manual holdover and reference switchover
4 pairs of reference input pins with each pair configurable as
a single differential input or as 2 independent single-ended inputs
Input reference frequencies from 1 Hz to 750 MHz
Reference validation and frequency monitoring (1 ppm)
Programmable input reference switchover priority
30-bit programmable input reference divider
4 pairs of clock output pins with each pair configurable as a
single differential LVDS/LVPECL output or as 2 single-ended CMOS outputs
Output frequencies up to 450 MHz
30-bit integer and 10-bit fractional programmable feedback
divider
Programmable digital loop filter covering loop bandwidths
from 0.001 Hz to 100 kHz
Optional low noise LC-VCO system clock multiplier
Optional crystal resonator for system clock input
On-chip EEPROM to store multiple power-up profiles
Software controlled power-down
88-lead LFCSP package
APPLICATIONS
Network synchronization
Cleanup of reference clock jitter
GPS 1 pulse per second synchronization
SONET/SDH clocks up to OC-192, including FEC
Stratum 2 holdover, jitter cleanup, and phase transient
control
Stratum 3E and Stratum 3 reference clocks
Wireless base station controllers
Cable infrastructure
Data communications
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
AD |
24+ |
LFCSP |
80000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價 | ||
ADI/亞德諾 |
1225+ |
QFN64 |
12668 |
只做原廠原裝,認(rèn)準(zhǔn)寶芯創(chuàng)配單專家 |
詢價 | ||
ADI |
2015+ |
SOP/DIP |
16998 |
一級代理AD原裝現(xiàn)貨,特價熱賣! |
詢價 | ||
ADI(亞德諾) |
23+ |
NA |
20094 |
正納10年以上分銷經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持 |
詢價 | ||
AD |
23+ |
原廠原包 |
19960 |
只做進(jìn)口原裝 終端工廠免費(fèi)送樣 |
詢價 | ||
AD |
1735+ |
LFCSP |
6528 |
科恒偉業(yè)!只做原裝正品!假一賠十! |
詢價 | ||
AD |
23+ |
64/LFCSP |
30000 |
代理全新原裝現(xiàn)貨,價格優(yōu)勢 |
詢價 | ||
Analog |
21+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開票! |
詢價 | |||
AnalogDevices |
64-LFCSP |
1500 |
AD代理旗下一級分銷商,主營AD全系列產(chǎn)品 |
詢價 | |||
ADI/亞德諾 |
23+ |
EB/PCB |
3000 |
只做原裝正品,假一賠十 |
詢價 |